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SKU-3 · SCL 180 nm BCD; sky130 prototype High-reliability PMIC

SKU-3 makes four sequenced rails from a 28 V bus, designed for a 100 V input spike.

Illustration: the part’s blocks on one die. Pre-silicon; not a render of manufactured silicon.

Every figure on this page is a design target unless marked otherwise.

Input
4.5 to 40 V continuous; 28 V nominal; 80 V surge; 100 V spike
Rails
5 V 2 A, 3.3 V 3 A, 1.8 V 500 mA, 1.2/0.9 V 300 mA
Upset hardening
DICE latches, TMR sequencer
Illustrative DeepGrid surveillance equipment and operator display
Defence and screened equipment. Existing DeepGrid application artwork · concept illustration, not a product photograph or deployment evidence. DeepGrid silicon remains pre-silicon.

SKU-3 makes four sequenced rails from a 28 V bus, designed for a 100 V input spike.

SKU-3 targets the power supplies used in military, railway and space equipment, where qualification is part of the buying decision.

Job
Turn an equipment power bus into sequenced board supplies.
Replaces
TI and ADI QML power parts in avionics and vetronics units; imported EN 50155-grade power parts in Indian rolling stock and signalling; imported radiation-tolerant PMICs on Indian satellites and launchers.
Status
RTL ready for the digital sequencer and telemetry; analog power circuits designed and simulated. The sky130 prototype tests the control logic and low-voltage rails; the 28 V front end and power stage arrive on SCL 180 nm.

The business case for SKU-3

Select the required grade and equipment programme first; a general power-management claim is not enough.

What it replaces

TI and ADI QML power parts in avionics and vetronics units; imported EN 50155-grade power parts in Indian rolling stock and signalling; imported radiation-tolerant PMICs on Indian satellites and launchers.

Customer opportunity

Military: defence electronics, approved-vendor-listed for decades once qualified. Railways: Kavach train protection and rolling stock, the volume grade. Space: satellites and launch vehicles, the value grade.

Policy and demand

Military: SRIJAN NSG-5962 class, and PIL-5 lists two tank DC-DC converters (16–40 V in, 4 A). Railways: Kavach is being fitted across locomotives and route kilometres, with RDSO approval as the gate. Space: the Indian Space Policy 2023 opened satellite building to private firms, and radiation-tolerant power parts are almost all imported and often export-controlled.

The delivery trade-off

LDMOS and thick-oxide options put a 28 V front end and a 0.9 V rail on one die. The same front end fits a spacecraft’s 28 V bus and sits behind a train’s isolated 110 V converter. Radiation hardening comes from the design: hardened latches and triple redundancy in the control logic.

Read SKU-3 in the SKU Blueprint

What SKU-⁠3 claims, what it is worth, and what gates it.

The following mechanisms explain the proposed customer benefit. Each still needs to be validated in the complete product.

  1. SKU-3 makes four sequenced rails from a 28 V bus, designed for a 100 V input spike.

    SKU-3 targets the power supplies used in military, railway and space equipment, where qualification is part of the buying decision.

  2. Military (883), railway (EN 50155) and space grades each run their own programme.

    Select the required grade and equipment programme first; a general power-management claim is not enough.

  3. The sky130 prototype tests control logic and low-voltage rails; the 28 V stage arrives on SCL 180 nm.

    Each environmental and screening requirement must be demonstrated for the intended grade.

Architecture targets, not datasheet values.

Every figure is a design target stated in the SKU Blueprint, page 16. None is a measurement of manufactured silicon.

  • 100 VInput spike
  • 3 ALargest rail, at 3.3 V
  • 12 ppm/°CReference drift
SKU-3 hi-rel PMIC architecture diagram: input conditioning, a synchronous-buck pre-regulator, reference and bias, four monitored rails, and supervision, sequencing and telemetry
Detailed architecture and specifications
Process
180 nm BCD (SCL Mohali production); 130 nm 20 V devices for prototyping
Input
4.5 to 40 V continuous; 28 V nominal; 80 V surge; 100 V spike
Pre-regulator
Synchronous buck, peak current mode, 500 kHz to 2 MHz
Rails
5 V 2 A, 3.3 V 3 A, 1.8 V 500 mA, 1.2/0.9 V 300 mA
Reference
Curvature-corrected bandgap, 12 ppm/°C, −55 to +125 °C
Telemetry
10-bit 500 kSPS ADC over SPI
Upset hardening
DICE latches, TMR sequencer
Grades
Military (883 screening); railway (EN 50155, behind an isolated 110 V converter); space (radiation-tolerant for LEO and launch vehicles, proven by TID/SEE testing)
Process
SCL 180 nm BCD; sky130 prototype
Maturity
Architecture scope
Designed toward
DO-160 sections 16 and 17 · MIL-STD-704F · MIL-STD-1275D · MIL-STD-461G · MIL-STD-883 Class B · EN 50155
Source
SKU Blueprint, October 2026, page 16

Standards the architecture is designed toward. No DeepGrid part holds a certification or qualification today.

System architecture, signal flow and engineering references
SKU-3 hi-rel PMIC architecture diagram: input conditioning, a synchronous-buck pre-regulator, reference and bias, four monitored rails, and supervision, sequencing and telemetry
  1. Marker ①: Input conditioning keeps bus surges off the rails

    The 28 V aircraft bus enters Input conditioning. EMI + TVS filters and clamps at 36 V, Ideal diode blocks reverse polarity, Inrush limits start-up current, and UVLO + OVLO locks out a bus that runs too low or too high, with hysteresis. The input spans 4.5 to 40 V continuous, with surges the rails must never see.

    Input conditioning

  2. Marker ②: The pre-regulator limits current on every cycle

    The conditioned bus feeds the Pre-regulator · synchronous buck. Error amp with type-III compensation and PWM comp with slope compensation set the duty between 500 kHz and 2 MHz, Gate driver adds adaptive dead-time, and Power stage is an LDMOS half-bridge on 30 V devices. Peak-current-mode control means a downstream fault cannot run away.

    Pre-regulator · synchronous buck

  3. Marker ③: One pre-regulated output feeds four rail regulators

    In Rail generation, Buck · 5 V delivers 2 A, Buck · 3.3 V delivers 3 A, LDO · 1.8 V delivers 500 mA and LDO · 1.2 / 0.9 V delivers 300 mA. Each one starts on a soft-start ramp, so the board supplies come up under control instead of all at once from the pre-regulator output.

    Rail generation

  4. Marker ④: The sequencer decides when each rail may start

    Each rail runs through a Window monitor, which flags over- and under-voltage outside a ±3% window, and an OC limit with foldback. Together they report power-good to the Sequencer in Supervision · sequencing · telemetry. The Sequencer follows a programmable four-step order and decides when each rail may start.

    Rail generationSupervision · sequencing · telemetry

  5. Marker ⑤: Current sense closes the fast inner loop

    Current sense, a sense-FET and amplifier in the pre-regulator, feeds back to the Error amp and closes the peak-current-mode inner loop that limits current cycle by cycle. Its stability is still a question: the target is more than 60° phase margin and 10 dB gain margin across −55 to +125 °C with ceramic or tantalum capacitors.

    Pre-regulator · synchronous buck

  6. Hardened logic and a trimmed reference hold the sequence

    SEU harden puts DICE latches and triple-modular redundancy on the sequencer state machine, so one particle strike cannot reorder or drop a rail. Watchdog adds a windowed check, and Telemetry reports voltage, current and die temperature through a 10-bit 500 kSPS ADC over SPI. In Reference + bias, a Brokaw Bandgap holds 12 ppm/°C, set by one-time OTP Trim.

    Supervision · sequencing · telemetryReference + bias

Numbered markers

  1. Marker ①: The 28 V bus enters input conditioning.
  2. Marker ②: The conditioned bus feeds the pre-regulator.
  3. Marker ③: The pre-regulator output feeds the four rail regulators.
  4. Marker ④: Each rail reports power-good to the sequencer through its window monitor and current limit.
  5. Marker ⑤: Current sense closes the peak-current-mode inner loop.

Block responsibilities

Input conditioning

EMI filter and TVS clamp, an ideal-diode reverse-polarity stage, soft-start inrush limiting, and hysteretic under- and over-voltage lockout.

Why An aircraft bus carries surges and spikes the downstream rails must never see.

Guide: Input conditioning
Pre-regulator · synchronous buck

A type-III error amplifier, a PWM comparator with slope compensation, an adaptive dead-time gate driver, an LDMOS half-bridge power stage and sense-FET current sensing.

Why Peak-current-mode control limits current cycle by cycle, so a fault downstream cannot run away.

Guide: Pre-regulator · synchronous buck
Reference + bias

A Brokaw bandgap at 1.20 V and 12 ppm/°C with one-time OTP trim, PTAT and CTAT bias, and an 8 MHz RC oscillator.

Guide: Reference + bias
Rail generation

Four sequenced rails, two bucks at 5 V and 3.3 V and two LDOs at 1.8 V and 1.2 or 0.9 V, each followed by an over- and under-voltage window monitor and a foldback current limit that reports power-good.

Guide: Rail generation
Supervision · sequencing · telemetry

A programmable four-step sequencer, a 10-bit 500 kSPS telemetry ADC for voltage, current and die temperature over SPI, a windowed watchdog, and DICE latches with TMR on the sequencer state machine.

Why A single-event upset must not reorder or drop a rail, so the sequencer state is hardened by design.

Guide: Supervision · sequencing · telemetry

Primary sources

3 integration and validation references

Background reading explains the general technique each block uses. None of it describes this part or implies its certification.

Architecture from the SKU Blueprint, page 16. A functional view, not a floorplan.

7 questions SKU-⁠3 has to answer before it can be relied on.

The Blueprint’s design and status notes raise these. Each is a question silicon, test or layout has to answer before SKU-3 can be relied on.

The input sees 4.5 to 40 V continuous, 80 V surges and 100 V spikes.Physics

A 180 nm BCD process with 30 V power devices and an input stage that clamps without thermal runaway.

A 12 ppm/°C reference from −55 to +125 °C.Physics

A curvature-corrected bandgap with large matched resistors, a mature-node strength.

A single particle strike must not corrupt the power sequence.Physics

Dual interlocked latches and triple-modular redundancy on the sequencer state machine.

100 V surge withstandOpen

During a 100 V, 50 ms load-dump surge, how does the input stage clamp without thermal runaway in the pass devices?

Loop stabilityOpen

Does the regulator keep more than 60° phase margin and 10 dB gain margin with ceramic or tantalum output capacitors across −55 to +125 °C?

Cross-rail noiseOpen

How much 3.3 V switching ripple reaches the 1.2 V converter supply through the shared reference?

Upset spacingOpen

What layout spacing keeps one heavy-ion strike from flipping two of the three voting bits?

An architecture, with its evidence named.

Strongest evidence
Architecture diagram in the SKU Blueprint; prototyping planned on sky130 20 V devices, production at SCL 180 nm.
Development status
RTL ready for the digital sequencer and telemetry; analog power circuits designed and simulated. The sky130 prototype tests the control logic and low-voltage rails; the 28 V front end and power stage arrive on SCL 180 nm.

Military, railway (EN 50155) and space requirements are intended qualification contexts, not held approvals; the space grade is radiation-tolerant, not rad-hard.

How every figure on this site was obtained

The systems it goes into, and the parts beside it.

Input transients, rail current, sequencing and screening requirements.

Parts beside it

Read the source behind every figure.

Each document opens inside the site at the cited section; the PDF is the edition of record.

Design files

Bring the socket. We will tell you what SKU-3 has to prove for it.

Send the platform, voltage and power environment, interfaces and qualification needs. The reply names what is architecture, what is evidence and what would have to be tested.